MC9S12HY64 Datasheet, PDF (285/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Analog-to-Digital Converter (ADC12B8CV1) Block Description
8.2 Signal Description
This section lists all inputs to the ADC12B8C block.
8.2.1 Detailed Signal Descriptions
8.2.1.1 ANx (x = 7, 6, 5, 4, 3, 2, 1, 0)
This pin serves as the analog input Channel x. It can also be configured as digital port or external trigger
for the ATD conversion.
8.2.1.2 ETRIG3, ETRIG2, ETRIG1, ETRIG0
These inputs can be configured to serve as an external trigger for the ATD conversion.
Refer to device specification for availability and connection of these inputs!
8.2.1.3 V_RH, V_RL
V_RH is the high reference voltage, V_RL is the low reference voltage for ATD conversion.
8.2.1.4 V_DDA, V_SSA
These pins are the power supplies for the analog circuitry of the ADC12B8C block.
8.3 Memory Map and Register Definition
This section provides a detailed description of all registers accessible in the ADC12B8C.
8.3.1 Module Memory Map
Figure 8-2 gives an overview on all ADC12B8C registers.
NOTE
Register Address = Base Address + Address Offset, where the Base Address
is defined at the MCU level and the Address Offset is defined at the module
level.
Address
0x0000
0x0001
0x0002
Name
ATDCTL0
ATDCTL1
ATDCTL2
Bit 7
R
Reserved
W
R
ETRIGSEL
W
R
0
W
6
0
SRES1
AFFC
5
4
3
2
1
Bit 0
0
0
WRAP3 WRAP2 WRAP1 WRAP0
SRES0 SMP_DIS ETRIGCH3 ETRIGCH2 ETRIGCH1 ETRIGCH0
ICLKSTP ETRIGLE ETRIGP ETRIGE ASCIE ACMPIE
= Unimplemented or Reserved
Figure 8-2. ADC12B8C Register Summary (Sheet 1 of 2)
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Freescale Semiconductor
285