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MC9S12HY64 Datasheet, PDF (164/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers | |||
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Background Debug Module (S12SBDMV1)
5.3.2.1 BDM Status Register (BDMSTS)
Register Global Address 0x3_FF01
7
R
ENBDM
W
Reset
Special Single-Chip Mode
01
All Other Modes
0
6
5
BDMACT
0
4
SDV
1
0
0
0
0
0
= Unimplemented, Reserved
3
2
1
0
TRACE
0
UNSEC
0
0
0
02
0
0
0
0
0
= Implemented (do not alter)
0
= Always read zero
1 ENBDM is read as 1 by a debugging environment in special single chip mode when the device is not secured or secured but
fully erased (Flash). This is because the ENBDM bit is set by the standard ï¬rmware before a BDM command can be fully
transmitted and executed.
2 UNSEC is read as 1 by a debugging environment in special single chip mode when the device is secured and fully erased,
else it is 0 and can only be read if not secure (see also bit description).
Figure 5-3. BDM Status Register (BDMSTS)
Read: All modes through BDM operation when not secured
Write: All modes through BDM operation when not secured, but subject to the following:
â ENBDM should only be set via a BDM hardware command if the BDM ï¬rmware commands
are needed. (This does not apply in special single chip mode).
â BDMACT can only be set by BDM hardware upon entry into BDM. It can only be cleared by
the standard BDM ï¬rmware lookup table upon exit from BDM active mode.
â All other bits, while writable via BDM hardware or standard BDM ï¬rmware write commands,
should only be altered by the BDM hardware or standard ï¬rmware lookup table as part of BDM
command execution.
Table 5-2. BDMSTS Field Descriptions
Field
7
ENBDM
6
BDMACT
Description
Enable BDM â This bit controls whether the BDM is enabled or disabled. When enabled, BDM can be made
active to allow ï¬rmware commands to be executed. When disabled, BDM cannot be made active but BDM
hardware commands are still allowed.
0 BDM disabled
1 BDM enabled
Note: ENBDM is set by the ï¬rmware out of reset in special single chip mode. In special single chip mode with
the device secured, this bit will not be set by the ï¬rmware until after the Flash erase verify tests are
complete.
BDM Active Status â This bit becomes set upon entering BDM. The standard BDM ï¬rmware lookup table is
then enabled and put into the memory map. BDMACT is cleared by a carefully timed store instruction in the
standard BDM ï¬rmware as part of the exit sequence to return to user code and remove the BDM memory from
the map.
0 BDM not active
1 BDM active
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
164
Freescale Semiconductor
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