MC9S12HY64 Datasheet, PDF (725/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Electrical Characteristics
Table A-6. 5-V I/O Characteristics
18 D Port T, S, R, AD interrupt input pulse passed (STOP) t_PULSE
4
—
—
tcyc
19 D IRQ pulse width, edge-sensitive mode (STOP)
PW_IRQ
1
—
—
tcyc
1. Maximum leakage current occurs at maximum operating temperature. Current decreases by approximately one-half for each
8° C to 12°C in the temperature range from 50°C to 125°C.
2. Refer to Section A.1.4, “Current Injection” for more details
3. Parameter only applies in stop or pseudo stop mode.
A.1.10 Supply Currents
This section describes the current consumption characteristics of the device as well as the conditions for
the measurements.
A.1.10.1 Measurement Conditions
IDD value is measured on VDDR pin. It does not include the current to drive external loads. Unless
otherwise noted the currents are measured in special single chip mode and the CPU code is executed from
RAM. For Run and Wait current measurements PLL is on and the reference clock is the IRC1M trimmed
to 1MHz. The bus frequency is 32MHz and the CPU frequency is 64MHz. Table A-7., Table A-8. and
Table A-9. show the configuration of the CPMU module and the peripherals for Run, Wait and Stop current
measurement.
Table A-7. CPMU Configuration for Pseudo Stop Current Measurement
CPMU REGISTER
CPMUCLKS
CPMUOSC
CPMURTI
CPMUCOP
Bit settings/Conditions
PLLSEL=0, PSTP=1,
PRE=PCE=RTIOSCSEL=COPOSCSEL=1
OSCE=1, External Square wave on EXTAL f_EXTAL=16MHz,
V_IH= 1.8V, V_IL=0V
RTDEC=0, RTR[6:4]=111, RTR[3:0]=1111;
WCOP=1, CR[2:0]=111
Table A-8. CPUM Configuration for Run/Wait and Full Stop Current Measurement
CPMU REGISTER
CPMUSYNR
CPMUPOSTDIV
CPMUCLKS
CPMUOSC
Bit settings/Conditions
VCOFRQ[1:0]=01,SYNDIV[5:0] = 32
POSTDIV[4:0]=0,
PLLSEL=1
OSCE=0,
Reference clock for PLL is f_ref=f_irc1m trimmed to 1MHz
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Freescale Semiconductor
725