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MC9S12HY64 Datasheet, PDF (496/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers | |||
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Timer Module (TIM16B8CV2) Block Description
Table 14-6. TSCR1 Field Descriptions (continued)
Field
4
TFFCA
3
PRNT
Description
Timer Fast Flag Clear All
0 Allows the timer ï¬ag clearing to function normally.
1 For TFLG1(0x000E), a read from an input capture or a write to the output compare channel (0x0010â0x001F)
causes the corresponding channel ï¬ag, CnF, to be cleared. For TFLG2 (0x000F), any access to the TCNT
register (0x0004, 0x0005) clears the TOF ï¬ag. Any access to the PACNT registers (0x0022, 0x0023) clears
the PAOVF and PAIF ï¬ags in the PAFLG register (0x0021). This has the advantage of eliminating software
overhead in a separate clear sequence. Extra care is required to avoid accidental ï¬ag clearing due to
unintended accesses.
Precision Timer
0 Enables legacy timer. PR0, PR1, and PR2 bits of the TSCR2 register are used for timer counter prescaler
selection.
1 Enables precision timer. All bits of the PTPSR register are used for Precision Timer Prescaler Selection, and
all bits.
This bit is writable only once out of reset.
14.3.2.7 Timer Toggle On Overï¬ow Register 1 (TTOV)
Module Base + 0x0007
R
W
Reset
7
TOV7
0
Read: Anytime
Write: Anytime
6
TOV6
5
TOV5
4
TOV4
3
TOV3
2
TOV2
1
TOV1
0
0
0
0
0
0
Figure 14-13. Timer Toggle On Overï¬ow Register 1 (TTOV)
0
TOV0
0
Table 14-7. TTOV Field Descriptions
Field
Description
7:0
TOV[7:0]
Toggle On Overï¬ow Bits â TOVx toggles output compare pin on overï¬ow. This feature only takes effect when
in output compare mode. When set, it takes precedence over forced output compare but not channel 7 override
events.
0 Toggle output compare pin on overï¬ow feature disabled.
1 Toggle output compare pin on overï¬ow feature enabled.
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
496
Freescale Semiconductor
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