MC9S12HY64 Datasheet, PDF (437/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Serial Communication Interface (S12SCIV5)
12.4 Functional Description
This section provides a complete functional description of the SCI block, detailing the operation of the
design from the end user perspective in a number of subsections.
Figure 12-14 shows the structure of the SCI module. The SCI allows full duplex, asynchronous, serial
communication between the CPU and remote devices, including other CPUs. The SCI transmitter and
receiver operate independently, although they use the same baud rate generator. The CPU monitors the
status of the SCI, writes the data to be transmitted, and processes received data.
IREN
SCI Data
Register
RXD
Infrared _{Ir_RXD}
Receive
Decoder
SCRXD
Receive
Shift Register
Receive
and Wakeup
Control
RE
RWU
LOOPS
RSRC
Bus
Clock
Baud Rate
Generator
SBR12:SBR0
Data Format
Control
M
WAKE
ILT
PE
PT
÷16
Transmit
Control
Transmit
T8
Shift Register
SCI Data
Register
TE
LOOPS
SBK
RSRC
RXD
R16XCLK
R32XCLK
SCTXD
Infrared
Transmit
Encoder
Ir_TXD
R8
NF
FE
PF
RAF
ILIE
IDLE
RDRF
OR
RIE
TIE
IDLE
TDRE
TC
TCIE
TDRE
TC
RXEDGIE
Active Edge _RXEDGIF
Detect
BKDIF
Break Detect
BKDIE
BKDFE
LIN Transmit _BERRIF
Collision
Detect
BERRIE
BERRM[1:0]
TXD
TNP[1:0] IREN
Figure 12-14. Detailed SCI Block Diagram
SCI
Interrupt
Request
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Freescale Semiconductor
437