MC9S12HY64 Datasheet, PDF (410/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Pulse-Width Modulator (S12PWM8B8CV1)
11.4.2 PWM Channel Timers
The main part of the PWM module are the actual timers. Each of the timer channels has a counter, a period
register and a duty register (each are 8-bit). The waveform output period is controlled by a match between
the period register and the value in the counter. The duty is controlled by a match between the duty register
and the counter value and causes the state of the output to change during the period. The starting polarity
of the output is also selectable on a per channel basis. Shown below in Figure 11-19 is the block diagram
for the PWM timer.
Clock Source
Gate
(Clock Edge
Sync)
8-Bit Counter
PWMCNTx
Up/Down
Reset
From Port PWMP
Data Register
8-bit Compare =
PWMDTYx
8-bit Compare =
PWMPERx
T _QM
U
QX
R
PPOLx
M
U
X To Pin
Driver
QT
Q
R
CAEx
PWMEx
Figure 11-19. PWM Timer Channel Block Diagram
11.4.2.1 PWM Enable
Each PWM channel has an enable bit (PWMEx) to start its waveform output. When any of the PWMEx
bits are set (PWMEx = 1), the associated PWM output signal is enabled immediately. However, the actual
PWM waveform is not available on the associated PWM output until its clock source begins its next cycle
due to the synchronization of PWMEx and the clock source. An exception to this is when channels are
concatenated. Refer to Section 11.4.2.7, “PWM 16-Bit Functions” for more detail.
NOTE
The first PWM cycle after enabling the channel can be irregular.
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
410
Freescale Semiconductor