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LM3S3748 Datasheet, PDF (81/753 Pages) List of Unclassifed Manufacturers – Microcontroller
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LM3S3748 Microcontroller
Register 4: Raw Interrupt Status (RIS), offset 0x050
Central location for system control raw interrupts. These are set and cleared by hardware.
Raw Interrupt Status (RIS)
Base 0x400F.E000
Offset 0x050
Type RO, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
MOSCPUPRIS USBPLLLRIS PLLLRIS
reserved
BORRIS reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:9
8
7
6
5:2
1
0
Name
reserved
MOSCPUPRIS
USBPLLLRIS
PLLLRIS
reserved
BORRIS
reserved
Type
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
MOSC Power Up Raw Interrupt Status
This bit is set when the PLL TMOSCPUP Timer asserts.
USB PLL Lock Raw Interrupt Status
This bit is set when the USB PLL TUSBREADY Timer asserts.
PLL Lock Raw Interrupt Status
This bit is set when the PLL TREADY Timer asserts.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Brown-Out Reset Raw Interrupt Status
This bit is the raw interrupt status for any brown-out conditions. If set,
a brown-out condition is currently active. This is an unregistered signal
from the brown-out detection circuit. An interrupt is reported if the BORIM
bit in the IMC register is set and the BORIOR bit in the PBORCTL register
is cleared.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
April 08, 2008
81
Preliminary
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