LM3S3748 Datasheet, PDF (653/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
Register 67: PWM0 Minimum Fault Period (PWM0MINFLTPER), offset 0x07C
Register 68: PWM1 Minimum Fault Period (PWM1MINFLTPER), offset 0x0BC
Register 69: PWM2 Minimum Fault Period (PWM2MINFLTPER), offset 0x0FC
Register 70: PWM3 Minimum Fault Period (PWM3MINFLTPER), offset 0x13C
This register is instantiated in each PWM generator. If the PWMnCTL register MINFLTPER bit is
set, indicating the use of fault condition extending, this register specifies the 16-bit time-extension
value. The value is loaded into a 16-bit down counter, and the counter value is used to extend the
fault condition. The fault condition is released in the clock immediately after the counter value reaches
0. The fault condition is asynchronous to the PWM clock; and the delay value is the product of the
PWM clock period and the (MFP field value + 1) or (MFP field value + 2) depending on when the
fault condition asserts with respect to the PWM clock. The counter decrements at the PWM clock
rate, without pause or condition.
PWM0 Minimum Fault Period (PWM0MINFLTPER)
Base 0x4002.8000
Offset 0x07C
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
MFP
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:16
15:0
Name
reserved
MFP
Type
R/W
RO
Reset
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Minimum Fault Period
The number of PWM clocks by which a fault condition is extended when
the delay is enabled by PWMnCTL MINFLTPER.
April 08, 2008
653
Preliminary