LM3S3748 Datasheet, PDF (473/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
16.2.4
Loopback Operation
The I²C modules can be placed into an internal loopback mode for diagnostic or debug work. This
is accomplished by setting the LPBK bit in the I²C Master Configuration (I2CMCR) register. In
loopback mode, the SDA and SCL signals from the master and slave modules are tied together.
16.2.5 Command Sequence Flow Charts
This section details the steps required to perform the various I²C transfer types in both master and
slave mode.
16.2.5.1 I²C Master Command Sequences
The figures that follow show the command sequences available for the I²C master.
Figure 16-7. Master Single SEND
Idle
Write Slave
Address to
I2CMSA
Write data to
I2CMDR
Sequence
may be
omitted in a
Single Master
system
Read I2CMCS
NO _{BUSBSY bit=0?}
YES
Write ---0-111 to
I2CMCS
Read I2CMCS
NO _{BUSY bit=0?}
YES
Error Service
NO _{ERROR bit=0?}
YES
Idle
April 08, 2008
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Preliminary