LM3S3748 Datasheet, PDF (532/753 Pages) List of Unclassifed Manufacturers – Microcontroller

Univeral Serial Bus (USB) Controller
Bit/Field
7
6
5
4:0
Name
reserved
FIFOACC
FORCEFS
reserved
Type
RO
R/W1S
R/W
RO
Reset
0
0
0
0x00
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
FIFO Access
The CPU sets this bit to transfer the packet in the endpoint 0 transmit
FIFO to the endpoint 0 receive FIFO. It is cleared automatically.
Force Full Speed
The CPU sets this bit to force the USB controller into Full-Speed mode
when it receives a USB reset. When 0, the USB controller operates at
Low Speed.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
532
April 08, 2008
Preliminary