LM3S3748 Datasheet, PDF (71/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
Figure 6-2. Main Clock Tree
XTAL^a
USBPWRDN^c
PLL
(240 MHz)
MOSCDIS ^a
Main OSC
XTAL^a
PWRDN ^b
PLL
(400 MHz)
IOSCDIS^a
Internal
OSC
(12 MHz)
÷4
Internal
OSC
(30 kHz)
OSCSRC^b,d
Hibernation
Module
(32.768 kHz)
÷4
USB Clock
USEPWMDIV ^a
PWMDW ^a
PWM Clock
USESYSDIV ^a,d
BYPASS ^b,d
SYSDIV ^b,d
PWRDN
÷ 25
System Clock
ADC Clock
a. Control provided by RCC register bit/field.
b. Control provided by RCC register bit/field or RCC2 register bit/field, if overridden with RCC2 register bit USERCC2.
c. Control provided by RCC2 register bit/field.
d. Also may be controlled by DSLPCLKCFG when in deep sleep mode.
6.1.5.2
Crystal Configuration for the Main Oscillator (MOSC)
The main oscillator supports the use of a select number of crystals. If the main oscillator is used by
the PLL as a reference clock, the supported range of crystals is 3.579545 to 16.384 MHz, otherwise,
the range of supported crystals is 1 to 16.384 MHz.
The XTAL bit in the RCC register (see page 85) describes the available crystal choices and default
programming values.
Software configures the RCC register XTAL field with the crystal number. If the PLL is used in the
design, the XTAL field value is internally translated to the PLL settings.
April 08, 2008
71
Preliminary