LM3S3748 Datasheet, PDF (207/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
9.3.4.2
2. Set bit 7 of the DMA Channel Primary Alternate Clear (DMAALTCLR) register to select the
primary channel control structure for this transfer.
3. Set bit 7 of the DMA Channel Useburst Clear (DMAUSEBURSTCLR) register to allow the
μDMA controller to respond to single and burst requests.
4. Set bit 7 of the DMA Channel Request Mask Clear (DMAREQMASKCLR) register to allow
the μDMA controller to recognize requests for this channel.
Configure the Channel Control Structure
Now the channel control structure must be configured. This example will transfer 8-bit bytes from
the peripheral's receive FIFO register into two memory buffers of 64 bytes each. As data is received,
when one buffer is full, the μDMA controller switches to use the other.
To use Ping-Pong buffering, both primary and alternate channel control structures must be used.
The primary control structure for channel 8 is at offset 0x080 of the channel control table, and the
alternate channel control structure is at offset 0x280. The channel control structures for channel 8
are located at the offsets shown in Table 9-11 on page 207.
Table 9-11. Primary and Alternate Channel Control Structure Offsets for Channel 8
Offset
Description
Control Table Base + 0x080 Channel 8 Primary Source End Pointer
Control Table Base + 0x084 Channel 8 Primary Destination End Pointer
Control Table Base + 0x088 Channel 8 Primary Control Word
Control Table Base + 0x280 Channel 8 Alternate Source End Pointer
Control Table Base + 0x284 Channel 8 Alternate Destination End Pointer
Control Table Base + 0x288 Channel 8 Alternate Control Word
Configure the Source and Destination
The source and destination end pointers must be set to the last address for the transfer (inclusive).
Since the peripheral pointer does not change, it simply points to the peripheral's data register. Both
the primary and alternate sets of pointers must be configured.
1. Set the primary source end pointer at offset 0x080 to the address of the peripheral's receive
buffer.
2. Set the primary destination end pointer at offset 0x084 to the address of ping-pong buffer A +
0x3F.
3. Set the alternate source end pointer at offset 0x280 to the address of the peripheral's receive
buffer.
4. Set the alternate destination end pointer at offset 0x284 to the address of ping-pong buffer B +
0x3F.
The primary control word at offset 0x088, and the alternate control word at offset 0x288 must be
programmed according to Table 9-10 on page 206. Both control words are initially programmed the
same way.
1. Program the primary channel control word at offset 0x088 according to Table 9-12 on page 208.
2. Program the alternate channel control word at offset 0x288 according to Table 9-12 on page 208.
April 08, 2008
207
Preliminary