LM3S3748 Datasheet, PDF (593/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
18.2.1
ACCNTL0 Comparator 0
ASRCP VIN- VIN+ Output Interrupt ADC Trigger
10
C0- Vref C0o/C1+ yes
yes
11
C0- reserved C0o/C1+ yes
yes
Table 18-2. Comparator 1 Operating Modes
ACCNTL1 Comparator 1
ASRCP
00
VIN- VIN+
Output Interrupt ADC Trigger
C1- C0o/C1+^a n/a
yes
yes
01
C1- C0+
n/a
yes
yes
10
C1- Vref
n/a
yes
yes
11
C1- reserved n/a
yes
yes
a. C0o and C1+ signals share a single pin and may only be used as one or the other.
Internal Reference Programming
The structure of the internal reference is shown in Figure 18-3 on page 593. This is controlled by a
single configuration register (ACREFCTL). Table 18-3 on page 593 shows the programming options
to develop specific internal reference values, to compare an external voltage against a particular
voltage generated internally.
Figure 18-3. Comparator Internal Reference Structure
AVDD
8R
R
8R
R
R
•••
EN
VREF
RNG
15 14
•••
1
0
Decoder
internal
reference
Table 18-3. Internal Reference Voltage and ACREFCTL Field Values
ACREFCTL Register
Output Reference Voltage Based on VREF Field Value
EN Bit Value RNG Bit Value
EN=0
RNG=X
0 V (GND) for any value of VREF; however, it is recommended that RNG=1 and VREF=0
for the least noisy ground reference.
April 08, 2008
593
Preliminary