LM3S3748 Datasheet, PDF (48/753 Pages) List of Unclassifed Manufacturers – Microcontroller

Memory Map
3 Memory Map
The memory map for the LM3S3748 controller is provided in Table 3-1 on page 48.
In this manual, register addresses are given as a hexadecimal increment, relative to the module’s
base address as shown in the memory map. See also Chapter 4, “Memory Map” in the ARM®
Cortex™-M3 Technical Reference Manual.
Table 3-1. Memory Map^a
Start
Memory
0x0000.0000
0x0002.0000
0x0100.0000
0x0100.2C00
0x2000.0000
0x2001.0000
0x2200.0000
0x2220.0000
FiRM Peripherals
0x4000.0000
0x4000.1000
0x4000.4000
0x4000.5000
0x4000.6000
0x4000.7000
0x4000.8000
0x4000.9000
0x4000.A000
0x4000.C000
0x4000.D000
0x4000.E000
Peripherals
0x4002.0000
0x4002.0800
0x4002.1000
0x4002.1800
0x4002.2000
0x4002.4000
0x4002.5000
0x4002.6000
0x4002.7000
0x4002.8000
End
0x0001.FFFF
0x00FF.FFFF
0x0100.2BFF
0x1FFF.FFFF
0x2000.FFFF
0x21FF.FFFF
0x221F.FFFF
0x3FFF.FFFF
0x4000.0FFF
0x4000.3FFF
0x4000.4FFF
0x4000.5FFF
0x4000.6FFF
0x4000.7FFF
0x4000.8FFF
0x4000.9FFF
0x4000.BFFF
0x4000.CFFF
0x4000.DFFF
0x4001.FFFF
0x4002.07FF
0x4002.0FFF
0x4002.17FF
0x4002.1FFF
0x4002.3FFF
0x4002.4FFF
0x4002.5FFF
0x4002.6FFF
0x4002.7FFF
0x4002.8FFF
Description
On-chip flash ^b
Reserved
On-chip ROM
Reserved
Bit-banded on-chip SRAM^c
Reserved
Bit-band alias of 0x2000.0000 through 0x200F.FFFF
Reserved
Watchdog timer
Reserved
GPIO Port A
GPIO Port B
GPIO Port C
GPIO Port D
SSI0
SSI1
Reserved
UART0
UART1
Reserved
I2C Master 0
I2C Slave 0
I2C Master 1
I2C Slave 1
Reserved
GPIO Port E
GPIO Port F
GPIO Port G
GPIO Port H
PWM
For details on
registers, see
page ...
166
-
165
-
166
-
160
-
333
-
258
258
258
258
441
441
-
394
394
-
481
494
481
494
-
258
258
258
258
612
48
April 08, 2008
Preliminary