LM3S3748 Datasheet, PDF (571/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
Host
Device
Register 68: USB Receive Byte Count Endpoint 1 (USBRXCOUNT1), offset
0x118
Register 69: USB Receive Byte Count Endpoint 2 (USBRXCOUNT2), offset
0x128
Register 70: USB Receive Byte Count Endpoint 3 (USBRXCOUNT3), offset
0x138
Note: The value returned changes as the FIFO is unloaded and is only valid while the RXRDY bit
in the USBRXCSRLn register is set.
USBRXCount1 is a 16-bit read-only register that holds the number of data bytes in the packet
currently in line to be read from the receive FIFO. If the packet is transmitted as multiple bulk packets,
the number given is for the combined packet.
USB Receive Byte Count Endpoint 1 (USBRXCOUNT1)
Base 0x4005.0000
Offset 0x118
Type RO, reset 0x0000
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
COUNT
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
15:13
12:0
Name
reserved
COUNT
Type
RO
RO
Reset
0x00
0x00
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Receive Packet Count
Number of bytes in the receive packet.
April 08, 2008
571
Preliminary