LM3S3748 Datasheet, PDF (210/753 Pages) List of Unclassifed Manufacturers – Microcontroller

Micro Direct Memory Access (μDMA)
Offset Name
0x028 DMAENASET
0x02C DMAENACLR
0x030 DMAALTSET
0x034 DMAALTCLR
0x038 DMAPRIOSET
0x03C DMAPRIOCLR
0x04C DMAERRCLR
0xFD0 DMAPeriphID4
0xFE0 DMAPeriphID0
0xFE4 DMAPeriphID1
0xFE8 DMAPeriphID2
0xFEC DMAPeriphID3
0xFF0 DMAPCellID0
0xFF4 DMAPCellID1
0xFF8 DMAPCellID2
0xFFC DMAPCellID3
Type
R/W
WO
R/W
WO
R/W
WO
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0x0000.0000
-
0x0000.0000
-
0x0000.0000
-
0x0000.0000
0x0000.0004
0x0000.0030
0x0000.00B2
0x0000.000B
0x0000.0000
0x0000.000D
0x0000.00F0
0x0000.0005
0x0000.00B1
Description
DMA Channel Enable Set
DMA Channel Enable Clear
DMA Channel Primary Alternate Set
DMA Channel Primary Alternate Clear
DMA Channel Priority Set
DMA Channel Priority Clear
DMA Bus Error Clear
DMA Peripheral Identification 4
DMA Peripheral Identification 0
DMA Peripheral Identification 1
DMA Peripheral Identification 2
DMA Peripheral Identification 3
DMA PrimeCell Identification 0
DMA PrimeCell Identification 1
DMA PrimeCell Identification 2
DMA PrimeCell Identification 3
See
page
230
232
233
235
236
238
239
245
241
242
243
244
246
247
248
249
9.5 μDMA Channel Control Structure
The μDMA Channel Control Structure holds the DMA transfer settings for a DMA channel. Each
channel has two control structures, which are located in a table in system memory. Refer to “Channel
Configuration” on page 192 for an explanation of the Channel Control Table and the Channel Control
Structure.
The channel control structure is one entry in the channel control table. There is a primary and
alternate structure for each channel. The primary control structures are located at offsets 0x0, 0x10,
0x20 and so on. The alternate control structures are located at offsets 0x200, 0x210, 0x220, and
so on.
210
April 08, 2008
Preliminary