LM3S3748 Datasheet, PDF (39/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
1.4.5
1.4.5.1
1.4.5.2
1.4.5.3
1.4.6
1.4.6.1
The LM3S3748 controller supports the USB 2.0 full-speed configuration with Device or USB Host
mode. The specified throughput for a USB 2.0 full-speed controller is 12 Mbps.
System Peripherals
Programmable GPIOs (see page 250)
General-purpose input/output (GPIO) pins offer flexibility for a variety of connections.
The Stellaris^® GPIO module is comprised of eight physical GPIO blocks, each corresponding to an
individual GPIO port. The GPIO module is FiRM-compliant (compliant to the ARM Foundation IP
for Real-Time Microcontrollers specification) and supports 3-61 programmable input/output pins.
The number of GPIOs available depends on the peripherals being used (see “Signal Tables” on page
675 for the signals available to each GPIO pin).
The GPIO module features programmable interrupt generation as either edge-triggered or
level-sensitive on all pins, programmable control for GPIO pad configuration, and bit masking in
both read and write operations through address lines. Pins configured as digital inputs are
Schmitt-triggered.
Four Programmable Timers (see page 297)
Programmable timers can be used to count or time external events that drive the Timer input pins.
The Stellaris^® General-Purpose Timer Module (GPTM) contains four GPTM blocks. Each GPTM
block provides two 16-bit timers/counters that can be configured to operate independently as timers
or event counters, or configured to operate as one 32-bit timer or one 32-bit Real-Time Clock (RTC).
Timers can also be used to trigger analog-to-digital (ADC) conversions.
When configured in 32-bit mode, a timer can run as a Real-Time Clock (RTC), one-shot timer or
periodic timer. When in 16-bit mode, a timer can run as a one-shot timer or periodic timer, and can
extend its precision by using an 8-bit prescaler. A 16-bit timer can also be configured for event
capture or Pulse Width Modulation (PWM) generation.
Watchdog Timer (see page 331)
A watchdog timer can generate nonmaskable interrupts (NMIs) or a reset when a time-out value is
reached. The watchdog timer is used to regain control when a system has failed due to a software
error or to the failure of an external device to respond in the expected way.
The Stellaris^® Watchdog Timer module consists of a 32-bit down counter, a programmable load
register, interrupt generation logic, and a locking register.
The Watchdog Timer can be configured to generate an interrupt to the controller on its first time-out,
and to generate a reset signal on its second time-out. Once the Watchdog Timer has been configured,
the lock register can be written to prevent the timer configuration from being inadvertently altered.
Memory Peripherals
The LM3S3748 controller offers both single-cycle SRAM and single-cycle Flash memory.
SRAM (see page 160)
The LM3S3748 static random access memory (SRAM) controller supports 64 KB SRAM. The internal
SRAM of the Stellaris^® devices is located at offset 0x0000.0000 of the device memory map. To
reduce the number of time-consuming read-modify-write (RMW) operations, ARM has introduced
bit-banding technology in the new Cortex-M3 processor. With a bit-band-enabled processor, certain
April 08, 2008
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Preliminary