LM3S3748 Datasheet, PDF (27/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
– Integrated Nested Vectored Interrupt Controller (NVIC) providing deterministic interrupt
handling
– 37 interrupts with eight priority levels
– Memory protection unit (MPU), providing a privileged mode for protected operating system
functionality
– Unaligned data access, enabling data to be efficiently packed into memory
– Atomic bit manipulation (bit-banding), delivering maximum memory utilization and streamlined
peripheral control
■ Internal Memory
– 128 KB single-cycle flash
• User-managed flash block protection on a 2-KB block basis
• User-managed flash data programming
• User-defined and managed flash-protection block
– 64 KB single-cycle SRAM
– Pre-programmed ROM containing the Stellaris^® family peripheral driver library (DriverLib)
and Stellaris^® boot loader
■ DMA Controller
– ARM PrimeCell® 32-channel configurable µDMA controller
– Support for multiple transfer modes:
• Basic, for simple transfer scenarios
• Ping-pong, for continuous data flow to/from peripherals
• Scatter-gather, from a programmable list of arbitrary transfers initiated from a single request
– Dedicated channels for supported peripherals
– One channel each for receive and transmit path for bidirectional peripherals
– Dedicated channel for software-initiated transfers
– Independently configured and operated channels
– Per-channel configurable bus arbitration scheme
– Two levels of priority
– Design optimizations for improved bus access performance between µDMA controller and
the processor core:
• µDMA controller access is subordinate to core access
April 08, 2008
27
Preliminary