LM3S3748 Datasheet, PDF (110/753 Pages) List of Unclassifed Manufacturers – Microcontroller

System Control
Register 22: Device Capabilities 7 (DC7), offset 0x028
This register is predefined by the part and can be used to verify uDMA channel features.
Device Capabilities 7 (DC7)
Base 0x400F.E000
Offset 0x028
Type RO, reset 0x03C0.0F3F
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
SSI1_TX SSI1_RX UART1_TX UART1_RX
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
15
Type RO
Reset
0
14
13
reserved
RO
RO
0
0
12
11
10
9
8
7
6
5
4
3
2
1
0
SSI0_TX SSI0_RX UART0_TX UART0_RX
reserved
USB_EP3_TX USB_EP3_RX USB_EP2_TX USB_EP2_RX USB_EP1_TX USB_EP1_RX
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
0
1
1
1
1
0
0
1
1
1
1
1
1
Bit/Field
31:26
25
24
23
22
21:12
11
10
9
8
7:6
5
4
Name
reserved
SSI1_TX
SSI1_RX
UART1_TX
UART1_RX
reserved
SSI0_TX
SSI0_RX
UART0_TX
UART0_RX
reserved
USB_EP3_TX
USB_EP3_RX
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
1
1
1
1
0
1
1
1
1
0
1
1
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SSI1 TX on uDMA Ch25. When set, indicates uDMA channel 25 is
available and connected to the transmit path of SSI module 1.
SSI1 RX on uDMA Ch24. When set, indicates uDMA channel 24 is
available and connected to the receive path of SSI module 1.
UART1 TX on uDMA Ch23. When set, indicates uDMA channel 23 is
available and connected to the transmit path of UART module 1.
UART1 RX on uDMA Ch22. When set, indicates uDMA channel 22 is
available and connected to the receive path of UART module 1.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SSI0 TX on uDMA Ch11. When set, indicates uDMA channel 11 is
available and connected to the transmit path of SSI module 0.
SSI0 RX on uDMA Ch10. When set, indicates uDMA channel 10 is
available and connected to the receive path of SSI module 0.
UART0 TX on uDMA Ch9. When set, indicates uDMA channel 9 is
available and connected to the transmit path of UART module 0.
UART0 RX on uDMA Ch8. When set, indicates uDMA channel 8 is
available and connected to the receive path of UART module 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
USB EP3 TX on uDMA Ch5. When set, indicates uDMA channel 5 is
available and connected to the transmit path of USB endpoint 3.
USB EP3 RX on uDMA Ch4. When set, indicates uDMA channel 4 is
available and connected to the receive path of USB endpoint 2.
110
April 08, 2008
Preliminary