LM3S3748 Datasheet, PDF (252/753 Pages) List of Unclassifed Manufacturers – Microcontroller

General-Purpose Input/Outputs (GPIOs)
Figure 10-2. Analog/Digital I/O Pads
Commit
Control
GPIOLOCK
GPIOCR
Alternate Input
Alternate Output
Alternate Output Enable
Mode
Control
GPIOAFSEL
Pad Input
Data
Control
GPIODATA
GPIODIR
GPIO Input
GPIO Output
GPIO Output Enable
Pad Output
Analog/Digital
I/O Pad
Pad Output Enable
Interrupt
Interrupt
Control
GPIOIS
GPIOIBE
GPIOIEV
GPIOIM
GPIORIS
GPIOMIS
GPIOICR
Pad
Control
GPIODR2R
GPIODR4R
GPIODR8R
GPIOSLR
GPIOPUR
GPIOPDR
GPIOODR
GPIODEN
GPIOAMSEL
Identification Registers
GPIOPeriphID0
GPIOPeriphID1
GPIOPeriphID2
GPIOPeriphID3
GPIOPeriphID4
GPIOPeriphID5
GPIOPeriphID6
GPIOPeriphID7
GPIOPCellID0
GPIOPCellID1
GPIOPCellID2
GPIOPCellID3
Analog Circuitry
ADC
(for PortE4 – 7 and
PortD4 – 7 pins that
connect to the ADC
input MUX)
Isolation
Circuit
Package I/O Pin
10.1.1
Data Control
The data control registers allow software to configure the operational modes of the GPIOs. The data
direction register configures the GPIO as an input or an output while the data register either captures
incoming data or drives it out to the pads.
10.1.1.1 Data Direction Operation
The GPIO Direction (GPIODIR) register (see page 260) is used to configure each individual pin as
an input or output. When the data direction bit is set to 0, the GPIO is configured as an input and
the corresponding data register bit will capture and store the value on the GPIO port. When the data
direction bit is set to 1, the GPIO is configured as an output and the corresponding data register bit
will be driven out on the GPIO port.
10.1.1.2 Data Register Operation
To aid in the efficiency of software, the GPIO ports allow for the modification of individual bits in the
GPIO Data (GPIODATA) register (see page 259) by using bits [9:2] of the address bus as a mask.
This allows software drivers to modify individual GPIO pins in a single instruction, without affecting
the state of the other pins. This is in contrast to the "typical" method of doing a read-modify-write
operation to set or clear an individual GPIO pin. To accommodate this feature, the GPIODATA
register covers 256 locations in the memory map.
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April 08, 2008
Preliminary