LM3S3748 Datasheet, PDF (631/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
Bit/Field
16
15:14
13:12
Name
FLTSRC
DBFallUpd
DBRiseUpd
Type
R/W
R/W
R/W
Reset
0
Description
Fault Condition Source
This bit specifies the fault condition source.
Value Description
0 Fault0
1 Register-Defined
Two registers (PWMnFLTINPUT and PWMnCMPSRC) specify
the fault condition source.
0
PWMnDBFALL Update Mode
Specifies the update mode for the PWMnDBFALL register.
Value Description
0 Immediate
The PWMnDBFALL register value is immediately updated on
a write.
1 Reserved
2 Locally Synchronized
Updates to the register are reflected to the generator the next
time the counter is 0.
3 Globally Synchronized
Updates to the register are delayed until the next time the
counter is 0 after a synchronous update has been requested
through the PWM Master Control (PWMCTL) register.
0
PWMnDBRISE Update Mode
Specifies the update mode for the PWMnDBRISE register.
Value Description
0 Immediate
The PWMnDBRISE register value is immediately updated on
a write.
1 Reserved
2 Locally Synchronized
Updates to the register are reflected to the generator the next
time the counter is 0.
3 Globally Synchronized
Updates to the register are delayed until the next time the
counter is 0 after a synchronous update has been requested
through the PWM Master Control (PWMCTL) register.
April 08, 2008
631
Preliminary