LM3S3748 Datasheet, PDF (523/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
Host
Device
Register 5: USB Transmit Interrupt Enable (USBTXIE), offset 0x006
USBTXIE is a 16-bit register that provides interrupt enable bits for the interrupts in USBTXIS. When
a bit in USBTXIE is set to 1, the USB interrupt to the processor is asserted when the corresponding
interrupt bit in the USBTXIS register is set. When a bit is cleared to 0, the interrupt in USBTXIS is
still set but the USB interrupt to the processor is not asserted. On reset, the bits corresponding to
endpoint 0 and transmit endpoints 1-3 are set to 1, while the remaining bits are set to 0.
USB Transmit Interrupt Enable (USBTXIE)
Base 0x4005.0000
Offset 0x006
Type R/W, reset 0x000F
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
EP3
EP2
EP1
EP0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
Bit/Field
15:4
3
2
1
0
Name
reserved
EP3
EP2
EP1
EP0
Type
RO
R/W
R/W
R/W
R/W
Reset
0x00
1
1
1
1
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
TX Endpoint 3 Interrupt Enable
TX Endpoint 2 Interrupt Enable
TX Endpoint 1 Interrupt Enable
TX and RX Endpoint 0 Interrupt Enable
April 08, 2008
523
Preliminary