LM3S3748 Datasheet, PDF (542/753 Pages) List of Unclassifed Manufacturers – Microcontroller

Univeral Serial Bus (USB) Controller
Register 28: USB Transmit Hub Address Endpoint 0 (USBTXHUBADDR0),
offset 0x082
Register 29: USB Transmit Hub Address Endpoint 1 (USBTXHUBADDR1),
offset 0x08A
Register 30: USB Transmit Hub Address Endpoint 2 (USBTXHUBADDR2),
offset 0x092
Register 31: USB Transmit Hub Address Endpoint 3 (USBTXHUBADDR3),
offset 0x09A
Host
USBTXHUBADDRn is an 8-bit read/write register that, like USBTXHUBPORTn, only needs to be
written when a full- or low-speed device is connected to transmit endpoint EPn via a high-speed
USB 2.0 hub. This register provides the necessary transaction translation to convert between
high-speed transmission and full-/low-speed transmission. This register records the address of that
USB 2.0 hub through which the target associated with the endpoint is accessed. This information,
together with the hub port in USBTXHUBPORTn, allows the USB controller to support split
transactions.
Note: USBTXHUBADDR0 is used for both receive and transmit for endpoint 0.
USB Transmit Hub Address Endpoint 0 (USBTXHUBADDR0)
Base 0x4005.0000
Offset 0x082
Type R/W, reset 0x00
7
6
5
4
3
2
1
0
MULTTRAN
ADDR
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit/Field
7
6:0
Name
MULTTRAN
ADDR
Type
R/W
R/W
Reset
0
0x00
Description
Multiple Translators
Indicates whether the hub has multiple transaction translators. Clear to
0 if single transaction translator; set to 1 if multiple transaction translators.
Hub Address
USB bus address for the USB 2.0 hub.
542
April 08, 2008
Preliminary