LM3S3748 Datasheet, PDF (527/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
Register 8: USB Interrupt Enable (USBIE), offset 0x00B
Host
USBIE is an 8-bit register that provides interrupt enable bits for each of the interrupts in USBIS. By
default, interrupt 1 and 2 are enabled.
Device
USBIE Host Mode
USB Interrupt Enable (USBIE)
Base 0x4005.0000
Offset 0x00B
Type R/W, reset 0x06
7
6
5
4
3
2
1
0
reserved
DISCON CONN SOF RESET RESUME SUSPND
Type RO
Reset
0
RO
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
1
1
0
Bit/Field
7:6
5
4
3
2
1
0
Name
reserved
DISCON
CONN
SOF
RESET
RESUME
SUSPND
Type
RO
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
1
1
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Enable Disconnect Interrupt
Set by CPU to enable DISCON in USBIS.
Enable Connect Interrupt
Set by CPU to enable CONN in USBIS.
Enable Start-of-Frame Interrupt
Set by CPU to enable SOF in USBIS.
Enable Reset Interrupt
Set by CPU to enable RESET in USBIS.
Enable Resume Interrupt
Set by CPU to enable RESUME in USBIS.
Enable Suspend Interrupt
Set by CPU to enable SUSPEND in USBIS.
USBIE Device Mode
USB Interrupt Enable (USBIE)
Base 0x4005.0000
Offset 0x00B
Type R/W, reset 0x06
7
6
5
4
reserved
DISCON CONN
Type RO
Reset
0
RO
R/W
R/W
0
0
0
3
2
1
0
SOF BABBLE RESUME SUSPND
R/W
R/W
R/W
R/W
0
1
1
0
April 08, 2008
527
Preliminary