LM3S3748 Datasheet, PDF (22/753 Pages) List of Unclassifed Manufacturers – Microcontroller

Table of Contents
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PWM3 Dead-Band Control (PWM3DBCTL), offset 0x128 ................................................. 648
PWM0 Dead-Band Rising-Edge Delay (PWM0DBRISE), offset 0x06C ............................. 649
PWM1 Dead-Band Rising-Edge Delay (PWM1DBRISE), offset 0x0AC ............................. 649
PWM2 Dead-Band Rising-Edge Delay (PWM2DBRISE), offset 0x0EC ............................. 649
PWM3 Dead-Band Rising-Edge Delay (PWM3DBRISE), offset 0x12C .............................. 649
PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset 0x070 ............................. 650
PWM1 Dead-Band Falling-Edge-Delay (PWM1DBFALL), offset 0x0B0 ............................. 650
PWM2 Dead-Band Falling-Edge-Delay (PWM2DBFALL), offset 0x0F0 ............................. 650
PWM3 Dead-Band Falling-Edge-Delay (PWM3DBFALL), offset 0x130 .............................. 650
PWM0 Fault Source 0 (PWM0FLTSRC0), offset 0x074 .................................................... 651
PWM1 Fault Source 0 (PWM1FLTSRC0), offset 0x0B4 .................................................... 651
PWM2 Fault Source 0 (PWM2FLTSRC0), offset 0x0F4 .................................................... 651
PWM3 Fault Source 0 (PWM3FLTSRC0), offset 0x134 .................................................... 651
PWM0 Minimum Fault Period (PWM0MINFLTPER), offset 0x07C ..................................... 653
PWM1 Minimum Fault Period (PWM1MINFLTPER), offset 0x0BC ..................................... 653
PWM2 Minimum Fault Period (PWM2MINFLTPER), offset 0x0FC ..................................... 653
PWM3 Minimum Fault Period (PWM3MINFLTPER), offset 0x13C ..................................... 653
PWM0 Fault Pin Logic Sense (PWM0FLTSEN), offset 0x800 ............................................ 654
PWM1 Fault Pin Logic Sense (PWM1FLTSEN), offset 0x880 ............................................ 654
PWM2 Fault Pin Logic Sense (PWM2FLTSEN), offset 0x900 ............................................ 654
PWM3 Fault Pin Logic Sense (PWM3FLTSEN), offset 0x980 ............................................ 654
PWM0 Fault Status 0 (PWM0FLTSTAT0), offset 0x804 .................................................... 655
PWM1 Fault Status 0 (PWM1FLTSTAT0), offset 0x884 .................................................... 655
PWM2 Fault Status 0 (PWM2FLTSTAT0), offset 0x904 .................................................... 655
PWM3 Fault Status 0 (PWM3FLTSTAT0), offset 0x984 .................................................... 655
Quadrature Encoder Interface (QEI) .......................................................................................... 657
Register 1: QEI Control (QEICTL), offset 0x000 ................................................................................ 662
Register 2: QEI Status (QEISTAT), offset 0x004 ................................................................................ 664
Register 3: QEI Position (QEIPOS), offset 0x008 .............................................................................. 665
Register 4: QEI Maximum Position (QEIMAXPOS), offset 0x00C ....................................................... 666
Register 5: QEI Timer Load (QEILOAD), offset 0x010 ....................................................................... 667
Register 6: QEI Timer (QEITIME), offset 0x014 ................................................................................. 668
Register 7: QEI Velocity Counter (QEICOUNT), offset 0x018 ............................................................. 669
Register 8: QEI Velocity (QEISPEED), offset 0x01C .......................................................................... 670
Register 9: QEI Interrupt Enable (QEIINTEN), offset 0x020 ............................................................... 671
Register 10: QEI Raw Interrupt Status (QEIRIS), offset 0x024 ............................................................. 672
Register 11: QEI Interrupt Status and Clear (QEIISC), offset 0x028 ..................................................... 673
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April 08, 2008
Preliminary