LM3S3748 Datasheet, PDF (521/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
Host
Device
Register 3: USB Transmit Interrupt Status (USBTXIS), offset 0x002
USBTXIS is a 16-bit read-only register that indicates which interrupts are currently active for endpoint
0 and the transmit endpoints 1–3.
Note: Bits relating to endpoints that have not been configured always return 0. Note also that all
active interrupts are cleared when this register is read.
USB Transmit Interrupt Status (USBTXIS)
Base 0x4005.0000
Offset 0x002
Type RO, reset 0x0000
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
EP3
EP2
EP1
EP0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
15:4
3
2
1
0
Name
reserved
EP3
EP2
EP1
EP0
Type
RO
RO
RO
RO
RO
Reset
0x00
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
TX Endpoint 3 Interrupt
TX Endpoint 2 Interrupt
TX Endpoint 1 Interrupt
TX and RX Endpoint 0 Interrupt
April 08, 2008
521
Preliminary