LM3S3748 Datasheet, PDF (545/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
Register 39: USB Receive Hub Address Endpoint 1 (USBRXHUBADDR1),
offset 0x08E
Register 40: USB Receive Hub Address Endpoint 2 (USBRXHUBADDR2),
offset 0x096
Register 41: USB Receive Hub Address Endpoint 3 (USBRXHUBADDR3),
offset 0x09E
Host
USBRXHUBADDRn is an 8-bit read/write register that, like USBRXHUBPORTn, only needs to be
written when a full- or low-speed device is connected to receive endpoint EPn via a high-speed USB
2.0 hub. This register provides the necessary transaction translation to convert between high-speed
transmission and full-/low-speed transmission. This register records the address of that USB 2.0
hub through which the target associated with the endpoint is accessed. This information, together
with the hub port in USBRXHUBPORTn, allows the USB controller to support split transactions.
Note: USBTXHUBADDR0 is used for both receive and transmit for endpoint 0.
USB Receive Hub Address Endpoint 1 (USBRXHUBADDR1)
Base 0x4005.0000
Offset 0x08E
Type R/W, reset 0x00
7
6
5
4
3
2
1
0
MULTTRAN
ADDR
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit/Field
7
6:0
Name
MULTTRAN
ADDR
Type
R/W
R/W
Reset
0
0x00
Description
Multiple Translators
Indicates whether the hub has multiple transaction translators. Clear to
0 if single transaction translator; set to 1 if multiple transaction translators.
Hub Address
USB bus address for the USB 2.0 hub.
April 08, 2008
545
Preliminary