LM3S3748 Datasheet, PDF (580/753 Pages) List of Unclassifed Manufacturers – Microcontroller

Univeral Serial Bus (USB) Controller
Host
Device
Register 87: USB Transmit Double Packet Buffer Disable
(USBTXDPKTBUFDIS), offset 0x342
USBTXDPKTBUFDIS is a 16-bit register that indicates which of the transmit endpoints have disabled
the double-packet buffer functionality (see the section called “Double-Packet Buffering” on page 505).
Note: Bits relating to endpoints that have not been configured may be asserted by writing a 1 their
respective register; however, the disable bit will have no observable effect.
USB Transmit Double Packet Buffer Disable (USBTXDPKTBUFDIS)
Base 0x4005.0000
Offset 0x342
Type R/W, reset 0x0000
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
EP3
EP2
EP1 reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
15:4
3
2
1
0
Name
reserved
EP3
EP2
EP1
reserved
Type
RO
R/W
R/W
R/W
RO
Reset
0x00
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
EP3 TX Double-Packet Buffer Disable
EP2 TX Double-Packet Buffer Disable
EP1 TX Double-Packet Buffer Disable
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
580
April 08, 2008
Preliminary