LM3S3748 Datasheet, PDF (141/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
Figure 7-3. Clock Source Using Dedicated Oscillator
Input
Voltage
Regulator
or Switch
IN OUT
EN
Stellaris Microcontroller
VDD
Clock
Source
(f_{EXT_OSC})
R_Term
XOSC0
N.C.
XOSC1
R_PU
Open drain
external wake
up circuit
HIB
WAKE
VBAT
GND
3V
Battery
7.2.3
Note:
X₁ = Crystal frequency is f_{XOSC_XTAL}.
R_L = Load resistor is R_{XOSC_LOAD}.
C_1,2 = Capacitor value derived from crystal vendor load capacitance specifications.
R_PU = Pull-up resistor (1 M½).
See “Hibernation Module” on page 697 for specific parameter values.
Battery Management
The Hibernation module can be independently powered by a battery or an auxiliary power source.
The module can monitor the voltage level of the battery and detect when the voltage drops below
2.35 V. When this happens, an interrupt can be generated. The module also can be configured so
that it will not go into Hibernate mode if the battery voltage drops below this threshold. Battery
voltage is not measured while in Hibernate mode.
Important: System level factors may affect the accuracy of the low battery detect circuit. The
designer should consider battery type, discharge characteristics, and a test load during
battery voltage measurements.
Note that the Hibernation module draws power from whichever source (VBAT or VDD) has the higher
voltage. Therefore, it is important to design the circuit to ensure that VDD is higher that VBAT under
nominal conditions or else the Hibernation module draws power from the battery even when VDD
is available.
The Hibernation module can be configured to detect a low battery condition by setting the LOWBATEN
bit of the HIBCTL register. In this configuration, the LOWBAT bit of the HIBRIS register will be set
when the battery level is low. If the VABORT bit is also set, then the module is prevented from entering
Hibernation mode when a low battery is detected. The module can also be configured to generate
an interrupt for the low-battery condition (see “Interrupts and Status” on page 143).
April 08, 2008
141
Preliminary