LM3S3748 Datasheet, PDF (15/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
DMA Peripheral Identification 2 (DMAPeriphID2), offset 0xFE8 ......................................... 243
DMA Peripheral Identification 3 (DMAPeriphID3), offset 0xFEC ........................................ 244
DMA Peripheral Identification 4 (DMAPeriphID4), offset 0xFD0 ......................................... 245
DMA PrimeCell Identification 0 (DMAPCellID0), offset 0xFF0 ........................................... 246
DMA PrimeCell Identification 1 (DMAPCellID1), offset 0xFF4 ........................................... 247
DMA PrimeCell Identification 2 (DMAPCellID2), offset 0xFF8 ........................................... 248
DMA PrimeCell Identification 3 (DMAPCellID3), offset 0xFFC ........................................... 249
General-Purpose Input/Outputs (GPIOs) ................................................................................... 250
Register 1: GPIO Data (GPIODATA), offset 0x000 ............................................................................ 259
Register 2: GPIO Direction (GPIODIR), offset 0x400 ......................................................................... 260
Register 3: GPIO Interrupt Sense (GPIOIS), offset 0x404 .................................................................. 261
Register 4: GPIO Interrupt Both Edges (GPIOIBE), offset 0x408 ........................................................ 262
Register 5: GPIO Interrupt Event (GPIOIEV), offset 0x40C ................................................................ 263
Register 6: GPIO Interrupt Mask (GPIOIM), offset 0x410 ................................................................... 264
Register 7: GPIO Raw Interrupt Status (GPIORIS), offset 0x414 ........................................................ 265
Register 8: GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 266
Register 9: GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 268
Register 10: GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 269
Register 11: GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 271
Register 12: GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 272
Register 13: GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 273
Register 14: GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 274
Register 15: GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 275
Register 16: GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 276
Register 17: GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 277
Register 18: GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 278
Register 19: GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 280
Register 20: GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 281
Register 21: GPIO Analog Mode Select (GPIOAMSEL), offset 0x528 ................................................... 283
Register 22: GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 285
Register 23: GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 286
Register 24: GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 287
Register 25: GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 288
Register 26: GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 289
Register 27: GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 290
Register 28: GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 291
Register 29: GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 292
Register 30: GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 293
Register 31: GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 294
Register 32: GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 295
Register 33: GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 296
General-Purpose Timers ............................................................................................................. 297
Register 1: GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 309
Register 2: GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 310
Register 3: GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 312
Register 4: GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 314
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 317
Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 319
April 08, 2008
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Preliminary