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LM3S3748 Datasheet, PDF (608/753 Pages) List of Unclassifed Manufacturers – Microcontroller
Pulse Width Modulator (PWM)
19.2.7
across PWM generator blocks when the timers in those blocks are synchronized, although this
is not required in order for this mechanism to function properly.
The following registers provide either local or global synchronization based on the state of the
PWMnCTL register Update bit value:
■ Generator Registers: PWMnLOAD, PWMnCMPA, and PWMnCMPB
The following registers are provided with the optional functionality of synchronously updating rather
than having all updates take immediate effect. The default update mode is immediate.
■ Module-Level Register: PWMENABLE
■ Generator Register: PWMnGENA, PWMnGENB, PWMnDBCTL, PWMnDBRISE, and
PWMnDBFALL.
All other registers are considered statically provisioned for the execution of an application or are
used dynamically for purposes unrelated to maintaining synchronization, and therefore, do not need
synchronous update functionality.
Fault Conditions
A fault condition is one in which the controller must be signaled to stop normal PWM function and
then sets the outputs to a safe state. There are two basic situations where this becomes necessary:
■ The controller is stalled and cannot perform the necessary computation in the time required for
motion control
■ An external error or event is detected, such as an error
The PWM unit uses the following inputs to generate a fault condition, including:
■ FAULTn pin assertion
■ A stall of the controller generated by the debugger
Fault conditions are calculated on a per-PWM generator basis. Each PWM generator configures
the necessary conditions to indicate a fault condition exists. This method allows the development
of applications with dependent and independent control.
Each PWM generator's mode control, including fault condition handling, is provided in the PWMnCTL
register. This register determines whether a single FAULT0 input is used (as previous Stellaris®
products support) or whether all FAULTn input signals may be used to generate a fault condition.
This register allows the fault condition duration to last as long as the external condition lasts, or it
may specify that the external condition be latched and the fault condition (and its effects) last until
cleared by software. Finally, this register also enables a counter that may be used to extend the
period of a fault condition for external events to assure that the duration is a minimum length. The
minimum fault period count is specified in the PWMnMINFLTPER register.
These PWM generator registers provide status, control, and configure the fault condition in each
PWM generator: PWMnFLTSRC0, PWMnFLTSTAT0, and PWMnFLTSEN.
There are up to four FAULT input pins (FAULT0-FAULT3). These pins may be used with circuits that
generate an active High or active Low signal to indicate an error condition. Each of the FAULTn pins
may be individually programmed for this logic sense using the PWMnFLTSEN register.
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April 08, 2008
Preliminary