LM3S3748 Datasheet, PDF (604/753 Pages) List of Unclassifed Manufacturers – Microcontroller

Pulse Width Modulator (PWM)
Figure 19-2. PWM Module Block Diagram
PWM Generator Block
Interrupts /
Triggers
PWMnCTL
Interrupt and
Trigger
Generator
PWMnINTEN
PWMnRIS
PWMnISC
zero
load
dir
PWMnLOAD
PWMnCOUNT
PWM Clock
PWMnCMPA
PWMnCMPB
cmp A
cmp B
PWMnGENA
PWMnGENB
Fault
PWMn_Fault
PWMnDBCTL
PWMnDBRISE
PWMnDBFALL
PWMn_A
PWMn_B
19.2
19.2.1
19.2.2
Functional Description
PWM Timer
The timer in each PWM generator runs in one of two modes: Count-Down mode or Count-Up/Down
mode. In Count-Down mode, the timer counts from the load value to zero, goes back to the load
value, and continues counting down. In Count-Up/Down mode, the timer counts from zero up to the
load value, back down to zero, back up to the load value, and so on. Generally, Count-Down mode
is used for generating left- or right-aligned PWM signals, while the Count-Up/Down mode is used
for generating center-aligned PWM signals.
The timers output three signals that are used in the PWM generation process: the direction signal
(this is always Low in Count-Down mode, but alternates between Low and High in Count-Up/Down
mode), a single-clock-cycle-width High pulse when the counter is zero, and a single-clock-cycle-width
High pulse when the counter is equal to the load value. Note that in Count-Down mode, the zero
pulse is immediately followed by the load pulse.
PWM Comparators
There are two comparators in each PWM generator that monitor the value of the counter; when
either match the counter, they output a single-clock-cycle-width High pulse. When in Count-Up/Down
mode, these comparators match both when counting up and when counting down; they are therefore
qualified by the counter direction signal. These qualified pulses are used in the PWM generation
process. If either comparator match value is greater than the counter load value, then that comparator
never outputs a High pulse.
Figure 19-3 on page 605 shows the behavior of the counter and the relationship of these pulses
when the counter is in Count-Down mode. Figure 19-4 on page 605 shows the behavior of the counter
and the relationship of these pulses when the counter is in Count-Up/Down mode.
604
April 08, 2008
Preliminary