LM3S3748 Datasheet, PDF (726/753 Pages) List of Unclassifed Manufacturers – Microcontroller

Register Quick Reference
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SRCR2, type R/W, offset 0x048, reset 0x00000000
UDMA
GPIOH
GPIOG
GPIOF
GPIOE
GPIOD
GPIOC
GPIOB
USB0
GPIOA
Hibernation Module
Base 0x400F.C000
HIBRTCC, type RO, offset 0x000, reset 0x0000.0000
RTCC
RTCC
HIBRTCM0, type R/W, offset 0x004, reset 0xFFFF.FFFF
RTCM0
RTCM0
HIBRTCM1, type R/W, offset 0x008, reset 0xFFFF.FFFF
RTCM1
RTCM1
HIBRTCLD, type R/W, offset 0x00C, reset 0xFFFF.FFFF
RTCLD
RTCLD
HIBCTL, type R/W, offset 0x010, reset 0x0000.0000
WRC
VABORT CLK32EN LOWBATEN PINWEN RTCWEN CLKSEL HIBREQ RTCEN
HIBIM, type R/W, offset 0x014, reset 0x0000.0000
HIBRIS, type RO, offset 0x018, reset 0x0000.0000
EXTW LOWBAT RTCALT1 RTCALT0
HIBMIS, type RO, offset 0x01C, reset 0x0000.0000
EXTW LOWBAT RTCALT1 RTCALT0
HIBIC, type R/W1C, offset 0x020, reset 0x0000.0000
EXTW LOWBAT RTCALT1 RTCALT0
HIBRTCT, type R/W, offset 0x024, reset 0x0000.7FFF
EXTW LOWBAT RTCALT1 RTCALT0
HIBDATA, type R/W, offset 0x030-0x12C, reset 0x0000.0000
Internal Memory
ROM Registers (System Control Offset)
Base 0x400F.E000
RMCTL, type R/W1C, offset 0x0F0, reset -
TRIM
RTD
RTD
Internal Memory
Flash Registers (Flash Control Offset)
Base 0x400F.D000
FMA, type R/W, offset 0x000, reset 0x0000.0000
OFFSET
BA
OFFSET
726
April 08, 2008
Preliminary