DS031 Datasheet, PDF (87/318 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Platform FPGAs: DC and Switching Characteristics
Source-Synchronous Switching Characteristics
The parameters in this section provide the necessary values for calculating timing budgets for Virtex-II source-synchronous
transmitter and receiver data-valid windows.
Table 45: Duty Cycle Distortion and Clock-Tree Skew
Speed Grade
Description
Duty Cycle Distortion⁽¹⁾
Clock Tree Skew⁽²⁾
Symbol
Device
-6
-5
-4
Units
T_{DCD_CLK0}
All
140
140
140
ps
T_{DCD_CLK180}
All
50
50
50
ps
T_CKSKEW
XC2V40
50
50
60
ps
XC2V80
50
50
60
ps
XC2V250
50
50
60
ps
XC2V500
50
50
60
ps
XC2V1000
80
80
90
ps
XC2V1500
80
80
90
ps
XC2V2000
100
100
110
ps
XC2V3000
100
100
110
ps
XC2V4000
400
400
450
ps
XC2V6000
500
500
550
ps
XC2V8000
600
650
ps
Notes:
1. These parameters represent the worst-case duty cycle distortion observable at the pins of the device using LVDS output buffers. For
cases where other I/O standards are used, IBIS can be used to calculate any additional duty cycle distortion that might be caused by
asymmetrical rise/fall times.
T_{DCD_CLK0} applies to cases where local (IOB) inversion is used to provide the negative-edge clock to the DDR element in the I/O.
T_{DCD_CLK180} applies to cases where the CLK180 output of the DCM is used to provide the negative-edge clock to the DDR element
in the I/O.
2. This value represents the worst-case clock-tree skew observable between sequential I/O elements. Significantly less clock-tree skew
exists for I/O registers that are close to each other and fed by the same or adjacent clock-tree branches. Use the Xilinx FPGA_Editor
and Timing Analyzer tools to evaluate clock skew specific to your application.
Table 46: Package Skew
Description
Symbol
Device/Package
Value Units
Package Skew⁽¹⁾
T_PKGSKEW
XC2V1000 / FF896
XC2V3000 / FF1152
130
ps
115
ps
XC2V3000 / BF957
130
ps
XC2V4000 / FF1152
130
ps
XC2V4000 / FF1517
200
ps
XC2V4000 / BF957
140
ps
XC2V6000 / FF1152
90
ps
XC2V6000 / FF1517
105
ps
XC2V6000 / BF957
105
ps
Notes:
1. These values represent the worst-case skew between any two balls of the package: shortest flight time to longest flight time from Pad
to Ball (7.1ps per mm).
2. Package trace length information is available for these device/package combinations. This information can be used to deskew the
package.
DS031-3 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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