DS031 Datasheet, PDF (112/318 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Platform FPGAs: Pinout Information
Table 7: FG456/FGG456 BGA — XC2V250, XC2V500, and XC2V1000
Bank
Pin Description
Pin Number No Connect in XC2V250
0
IO_L93N_0
B10
0
IO_L93P_0
A10
0
IO_L94N_0/VREF_0
E11
0
IO_L94P_0
F11
0
IO_L95N_0/GCLK7P
D11
0
IO_L95P_0/GCLK6S
C11
0
IO_L96N_0/GCLK5P
B11
0
IO_L96P_0/GCLK4S
A11
No Connect in XC2V500
1
IO_L96N_1/GCLK3P
F12
1
IO_L96P_1/GCLK2S
F13
1
IO_L95N_1/GCLK1P
E12
1
IO_L95P_1/GCLK0S
D12
1
IO_L94N_1
C12
1
IO_L94P_1/VREF_1
B12
1
IO_L93N_1
A13
1
IO_L93P_1
B13
1
IO_L92N_1
C13
1
IO_L92P_1
D13
1
IO_L91N_1
E13
1
IO_L91P_1/VREF_1
E14
1
IO_L54N_1
A14
NC
1
IO_L54P_1
B14
NC
1
IO_L52N_1
C14
NC
1
IO_L52P_1
D14
NC
1
IO_L51N_1/VREF_1
A15
NC
1
IO_L51P_1
B15
NC
1
IO_L49N_1
C15
NC
1
IO_L49P_1
D15
NC
1
IO_L24N_1
F14
NC
NC
1
IO_L24P_1
E15
NC
NC
1
IO_L22N_1
A16
NC
NC
1
IO_L22P_1
B16
NC
NC
1
IO_L21N_1/VREF_1
C16
NC
NC
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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