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DS031 Datasheet, PDF (108/318 Pages) Xilinx, Inc – Summary of Features
R
Virtex-II Platform FPGAs: Pinout Information
Table 6: FG256/FGG256 BGA — XC2V40, XC2V80, XC2V250, XC2V500, and XC2V1000
Bank
Pin Description
Pin Number No Connect in XC2V40
6
VCCO_6
J5
7
VCCO_7
H6
7
VCCO_7
H5
7
VCCO_7
G6
No Connect in XC2V80
NA
CCLK
P15
NA
PROG_B
A2
NA
DONE
R14
NA
M0
T2
NA
M1
P2
NA
M2
R3
NA
HSWAP_EN
B3
NA
TCK
A15
NA
TDI
C2
NA
TDO
C15
NA
TMS
B14
NA
PWRDWN_B
T15
NA
RSVD
A4
NA
RSVD
A3
NA
VBATT
A14
NA
RSVD
A13
NA
VCCAUX
R16
NA
VCCAUX
R1
NA
VCCAUX
B16
NA
VCCAUX
B1
NA
VCCINT
N13
NA
VCCINT
N4
NA
VCCINT
M12
NA
VCCINT
M5
NA
VCCINT
E12
NA
VCCINT
E5
NA
VCCINT
D13
NA
VCCINT
D4
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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