DS031 Datasheet, PDF (109/318 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Platform FPGAs: Pinout Information
Table 6: FG256/FGG256 BGA — XC2V40, XC2V80, XC2V250, XC2V500, and XC2V1000
Bank
Pin Description
Pin Number No Connect in XC2V40 No Connect in XC2V80
NA
GND
T16
NA
GND
T1
NA
GND
R15
NA
GND
R2
NA
GND
P14
NA
GND
P3
NA
GND
L11
NA
GND
L6
NA
GND
K10
NA
GND
K9
NA
GND
K8
NA
GND
K7
NA
GND
J10
NA
GND
J9
NA
GND
J8
NA
GND
J7
NA
GND
H10
NA
GND
H9
NA
GND
H8
NA
GND
H7
NA
GND
G10
NA
GND
G9
NA
GND
G8
NA
GND
G7
NA
GND
F11
NA
GND
F6
NA
GND
C14
NA
GND
C3
NA
GND
B15
NA
GND
B2
NA
GND
A16
NA
GND
A1
Notes:
1. See Table 4 for an explanation of the signals available on this pin.
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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