DS031 Datasheet, PDF (131/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 8: FG676/FGG676 BGA — XC2V1500, XC2V2000, and XC2V3000
Bank
Pin Description
Pin Number No Connect in XC2V1500
2
IO_L96P_2
N23
No Connect in XC2V2000
3
IO_L96N_3
N26
3
IO_L96P_3
P26
3
IO_L94N_3
P23
3
IO_L94P_3
P22
3
IO_L93N_3/VREF_3
P19
3
IO_L93P_3
N19
3
IO_L91N_3
P21
3
IO_L91P_3
P20
3
IO_L78N_3
R26
NC
3
IO_L78P_3
R25
NC
3
IO_L76N_3
R20
NC
3
IO_L76P_3
R19
NC
3
IO_L75N_3/VREF_3
R24
NC
3
IO_L75P_3
R23
NC
3
IO_L73N_3
R22
NC
3
IO_L73P_3
R21
NC
3
IO_L72N_3
T26
3
IO_L72P_3
T25
3
IO_L70N_3
T20
3
IO_L70P_3
T19
3
IO_L69N_3/VREF_3
T24
3
IO_L69P_3
T23
3
IO_L67N_3
T22
3
IO_L67P_3
T21
3
IO_L54N_3
U26
3
IO_L54P_3
V26
3
IO_L52N_3
U24
3
IO_L52P_3
U23
3
IO_L51N_3/VREF_3
U22
3
IO_L51P_3
U21
3
IO_L49N_3
V25
3
IO_L49P_3
V24
3
IO_L48N_3
V23
3
IO_L48P_3
V22
3
IO_L46N_3
W26
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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