DS031 Datasheet, PDF (249/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 13: FF1517 BGA — XC2V4000, XC2V6000, and XC2V8000
Bank
Pin Description
Pin Number No Connect in the XC2V4000 No Connect in the XC2V6000
0
IO_L76P_0
C24
0
IO_L77N_0
K22
0
IO_L77P_0
K21
0
IO_L78N_0
E22
0
IO_L78P_0
E23
0
IO_L79N_0
B23
0
IO_L79P_0
B24
0
IO_L80N_0
J22
0
IO_L80P_0
J21
0
IO_L81N_0
G21
0
IO_L81P_0/VREF_0
G22
0
IO_L82N_0
A23
0
IO_L82P_0
A24
0
IO_L83N_0
H22
0
IO_L83P_0
H21
0
IO_L84N_0
F21
0
IO_L84P_0
F22
0
IO_L91N_0/VREF_0
B21
0
IO_L91P_0
B22
0
IO_L92N_0
L20
0
IO_L92P_0
M20
0
IO_L93N_0
E21
0
IO_L93P_0
D22
0
IO_L94N_0/VREF_0
A21
0
IO_L94P_0
A22
0
IO_L95N_0/GCLK7P
H20
0
IO_L95P_0/GCLK6S
J20
0
IO_L96N_0/GCLK5P
C21
0
IO_L96P_0/GCLK4S
D21
1
IO_L96N_1/GCLK3P
F19
1
IO_L96P_1/GCLK2S
F20
1
IO_L95N_1/GCLK1P
H19
1
IO_L95P_1/GCLK0S
H18
1
IO_L94N_1
C19
1
IO_L94P_1/VREF_1
C20
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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