DS031 Datasheet, PDF (105/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 6: FG256/FGG256 BGA — XC2V40, XC2V80, XC2V250, XC2V500, and XC2V1000
Bank
Pin Description
Pin Number No Connect in XC2V40
4
IO_L91N_4/VREF_4
R11
NC
4
IO_L91P_4
T11
NC
4
IO_L92N_4
M11
NC
4
IO_L92P_4
M10
NC
4
IO_L93N_4
N10
NC
4
IO_L93P_4
P10
NC
4
IO_L94N_4/VREF_4
R10
4
IO_L94P_4
T10
4
IO_L95N_4/GCLK3S
N9
4
IO_L95P_4/GCLK2P
P9
4
IO_L96N_4/GCLK1S
R9
4
IO_L96P_4/GCLK0P
T9
No Connect in XC2V80
NC
NC
NC
NC
NC
NC
5
IO_L96N_5/GCLK7S
T8
5
IO_L96P_5/GCLK6P
R8
5
IO_L95N_5/GCLK5S
P8
5
IO_L95P_5/GCLK4P
N8
5
IO_L94N_5
T7
5
IO_L94P_5/VREF_5
R7
5
IO_L93N_5
P7
NC
NC
5
IO_L93P_5
N7
NC
NC
5
IO_L92N_5
M7
NC
NC
5
IO_L92P_5
M6
NC
NC
5
IO_L91N_5
T6
NC
NC
5
IO_L91P_5/VREF_5
R6
NC
NC
5
IO_L05N_5/VRP_5
P6
NC
NC
5
IO_L05P_5/VRN_5
N6
NC
NC
5
IO_L04N_5
T5
NC
NC
5
IO_L04P_5/VREF_5
R5
NC
NC
5
IO_L03N_5/D4/ALT_VRP_5
P5
5
IO_L03P_5/D5/ALT_VRN_5
N5
5
IO_L02N_5/D6
R4
5
IO_L02P_5/D7
P4
5
IO_L01N_5/RDWR_B
T4
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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