DS031 Datasheet, PDF (222/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 12: FF1152 BGA — XC2V3000, XC2V4000, XC2V6000, and XC2V8000
Bank
Pin Description
Pin Number
3
IO_L53P_3
AD2
3
IO_L52N_3
AC8
3
IO_L52P_3
AB8
3
IO_L51N_3/VREF_3
AB10
3
IO_L51P_3
AC10
3
IO_L50N_3
AD5
3
IO_L50P_3
AE5
3
IO_L49N_3
AE4
3
IO_L49P_3
AF4
3
IO_L48N_3
AB9
3
IO_L48P_3
AC9
3
IO_L47N_3
AE2
3
IO_L47P_3
AF1
3
IO_L46N_3
AD6
3
IO_L46P_3
AE6
3
IO_L45N_3/VREF_3
AD9
3
IO_L45P_3
AE9
3
IO_L44N_3
AF2
3
IO_L44P_3
AG2
3
IO_L43N_3
AF3
3
IO_L43P_3
AG3
3
IO_L30N_3
AD7
3
IO_L30P_3
AE7
3
IO_L29N_3
AF5
3
IO_L29P_3
AG5
3
IO_L28N_3
AE8
3
IO_L28P_3
AD8
3
IO_L27N_3/VREF_3
AF8
3
IO_L27P_3
AF9
3
IO_L26N_3
AH1
3
IO_L26P_3
AJ1
3
IO_L25N_3
AG4
3
IO_L25P_3
AH5
3
IO_L24N_3
AF6
3
IO_L24P_3
AG6
3
IO_L23N_3
AH3
No Connect in the XC2V3000
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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