DS031 Datasheet, PDF (124/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 7: FG456/FGG456 BGA — XC2V250, XC2V500, and XC2V1000
Bank
Pin Description
Pin Number No Connect in XC2V250
NA
GND
M10
NA
GND
M9
NA
GND
L14
NA
GND
L13
NA
GND
L12
NA
GND
L11
NA
GND
L10
NA
GND
L9
NA
GND
K14
NA
GND
K13
NA
GND
K12
NA
GND
K11
NA
GND
K10
NA
GND
K9
NA
GND
J14
NA
GND
J13
NA
GND
J12
NA
GND
J11
NA
GND
J10
NA
GND
J9
NA
GND
D19
NA
GND
D4
NA
GND
C20
NA
GND
C3
NA
GND
B21
NA
GND
B2
NA
GND
A22
NA
GND
A1
Notes:
1. See Table 4 for an explanation of the signals available on this pin.
No Connect in XC2V500
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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