DS031 Datasheet, PDF (77/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: DC and Switching Characteristics
CCLK
CS_B
RDWR_B
DATA[0:7]
BUSY
3
T_SMCSCC
5
TSMCCW
1
T_SMDCC
2
TSMCCD
4
TSMCCCS
6
TSMWCC
7
TSMCKBY
No Write
Write
No Write
Write
ds083-3_10_012004
Figure 5: SelectMAP Mode Data Loading Sequence (Generic)
Table 32: SelectMAP Mode Write Timing Characteristics
Description
Figure
References
DATA[0:7] setup/hold
1/2
CS_B setup/hold
3/4
RDWR_B setup/hold
5/6
CCLK BUSY propagation delay
7
Maximum start-up frequency
Maximum frequency
Maximum frequency with no handshake
Symbol
T_SMDCC/T_SMCCD
T_SMCSCC/T_SMCCCS
T_SMCCW/T_SMWCC
T_SMCKBY
F_{CC_STARTUP}
F_{CC_SELECTMAP}
F_CCNH
Value
5.0/0.0
7.0/0.0
7.0/0.0
12.0
50
50
50
Units
ns, min
ns, min
ns, min
ns, max
MHz, max
MHz, max
MHz, max
DS031-3 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
Module 3 of 4
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