DS031 Datasheet, PDF (118/318 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Platform FPGAs: Pinout Information
Table 7: FG456/FGG456 BGA — XC2V250, XC2V500, and XC2V1000
Bank
Pin Description
Pin Number No Connect in XC2V250
5
IO_L06P_5
W6
5
IO_L05N_5/VRP_5
V7
5
IO_L05P_5/VRN_5
V6
5
IO_L04N_5
AB5
5
IO_L04P_5/VREF_5
AA5
5
IO_L03N_5/D4/ALT_VRP_5
Y5
5
IO_L03P_5/D5/ALT_VRN_5
W5
5
IO_L02N_5/D6
AB4
5
IO_L02P_5/D7
AA4
5
IO_L01N_5/RDWR_B
Y4
5
IO_L01P_5/CS_B
AA3
No Connect in XC2V500
6
IO_L01P_6
V5
6
IO_L01N_6
U5
6
IO_L02P_6/VRN_6
Y2
6
IO_L02N_6/VRP_6
Y1
6
IO_L03P_6
V4
6
IO_L03N_6/VREF_6
V3
6
IO_L04P_6
W2
6
IO_L04N_6
W1
6
IO_L06P_6
U4
6
IO_L06N_6
U3
6
IO_L19P_6
V2
NC
NC
6
IO_L19N_6
V1
NC
NC
6
IO_L21P_6
U2
NC
NC
6
IO_L21N_6/VREF_6
U1
NC
NC
6
IO_L22P_6
T5
NC
NC
6
IO_L22N_6
R5
NC
NC
6
IO_L24P_6
T4
NC
NC
6
IO_L24N_6
T3
NC
NC
6
IO_L43P_6
T2
6
IO_L43N_6
T1
6
IO_L45P_6
R4
6
IO_L45N_6/VREF_6
R3
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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