DS031 Datasheet, PDF (54/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: DC and Switching Characteristics
Extended LVDS DC Specifications (LVDSEXT_33 & LVDSEXT_25)
Table 9: Extended LVDS DC Specifications
DC Parameter
Symbol
Conditions
Supply Voltage
Output High voltage for Q and Q
Output Low voltage for Q and Q
Differential output voltage (Q – Q),
Q = High (Q – Q), Q = High
V_CCO
V_OH
V_OL
V_ODIFF
R_T = 100 Ω across Q and Q signals
R_T = 100 Ω across Q and Q signals
R_T = 100 Ω across Q and Q signals
Output common-mode voltage
Differential input voltage (Q – Q),
Q = High (Q – Q), Q = High
V_OCM
V_IDIFF
R_T = 100 Ω across Q and Q signals
Common-mode input voltage = 1.25 V
Input common-mode voltage
V_ICM
Differential input voltage = ±350 mV
Min
Typ
3.3 or 2.5
0.705
Max
1.785
440
820
1.125 1.200
1.375
100
350
N/A
0.2
1.25
V_CCO – 0.5
Units
V
V
V
mV
V
mV
V
LVPECL DC Specifications
These values are valid when driving a 100 Ω differential
load only, i.e., a 100 Ω resistor between the two receiver
pins. The V_OH levels are 200 mV below standard LVPECL
levels and are compatible with devices tolerant of lower
common-mode ranges. Table 10 summarizes the DC output
specifications of LVPECL. For more information on using
LVPECL, see the Virtex-II User Guide.
Table 10: LVPECL DC Specifications
DC Parameter
Min
Max
Min
Max
Min Max
Units
V_CCO
V_OH
V_OL
V_IH
V_IL
Differential Input Voltage
3.0
3.3
3.6
V
1.8
2.11
1.92
2.28
2.13 2.41
V
0.96
1.27
1.06
1.43
1.30 1.57
V
1.49
2.72
1.49
2.72
1.49 2.72
V
0.86 2.125 0.86 2.125 0.86 2.125
V
0.3
–
0.3
–
0.3
–
V
DS031-3 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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