DS031 Datasheet, PDF (120/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 7: FG456/FGG456 BGA — XC2V250, XC2V500, and XC2V1000
Bank
Pin Description
Pin Number No Connect in XC2V250
7
IO_L51N_7
J2
NC
7
IO_L49P_7
J3
NC
7
IO_L49N_7
J4
NC
7
IO_L48P_7
H1
7
IO_L48N_7
H2
7
IO_L46P_7
H3
7
IO_L46N_7
H4
7
IO_L45P_7/VREF_7
J6
7
IO_L45N_7
H5
7
IO_L43P_7
G1
7
IO_L43N_7
G2
7
IO_L24P_7
G3
NC
7
IO_L24N_7
G4
NC
7
IO_L22P_7
F1
NC
7
IO_L22N_7
F2
NC
7
IO_L21P_7/VREF_7
F3
NC
7
IO_L21N_7
F4
NC
7
IO_L19P_7
G5
NC
7
IO_L19N_7
F5
NC
7
IO_L06P_7
E1
7
IO_L06N_7
E2
7
IO_L04P_7
E3
7
IO_L04N_7
E4
7
IO_L03P_7/VREF_7
D1
7
IO_L03N_7
D2
7
IO_L02P_7/VRN_7
C1
7
IO_L02N_7/VRP_7
C2
7
IO_L01P_7
E5
7
IO_L01N_7
E6
No Connect in XC2V500
NC
NC
NC
NC
NC
NC
NC
NC
0
VCCO_0
G11
0
VCCO_0
G10
0
VCCO_0
G9
0
VCCO_0
F8
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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