DS031 Datasheet, PDF (202/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 11: FF896 BGA — XC2V1000, XC2V1500, and XC2V2000
Bank
Pin Description
Pin Number No Connect in the XC2V1000 No Connect in the XC2V1500
7
IO_L52P_7
J29
7
IO_L52N_7
K29
7
IO_L51P_7/VREF_7
K27
7
IO_L51N_7
J27
7
IO_L50P_7
L24
7
IO_L50N_7
K24
7
IO_L49P_7
H27
7
IO_L49N_7
J28
7
IO_L48P_7
H26
7
IO_L48N_7
J26
7
IO_L47P_7
K25
7
IO_L47N_7
J25
7
IO_L46P_7
H28
7
IO_L46N_7
H29
7
IO_L45P_7/VREF_7
G28
7
IO_L45N_7
F28
7
IO_L44P_7
L23
7
IO_L44N_7
K23
7
IO_L43P_7
F30
7
IO_L43N_7
G30
7
IO_L24P_7
F26
7
IO_L24N_7
G27
7
IO_L23P_7
J24
7
IO_L23N_7
H24
7
IO_L22P_7
F29
7
IO_L22N_7
G29
7
IO_L21P_7/VREF_7
G26
7
IO_L21N_7
G25
7
IO_L20P_7
H25
7
IO_L20N_7
G24
7
IO_L19P_7
D30
7
IO_L19N_7
E30
7
IO_L06P_7
E27
7
IO_L06N_7
F27
7
IO_L05P_7
J23
7
IO_L05N_7
H22
7
IO_L04P_7
C29
DS031-4 (v3.5) November 5, 2007
Product Specification
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