DS031 Datasheet, PDF (186/318 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Platform FPGAs: Pinout Information
FF896 Flip-Chip Fine-Pitch BGA Package
As shown in Table 11, XC2V1000, XC2V1500, and XC2V2000 Virtex-II devices are available in the FF896 flip-chip fine-pitch
BGA package. Pins in the XC2V1000, XC2V1500, and XC2V2000 devices are the same, except for the pin differences in the
XC2V1000 and XC2V1500 devices shown in the No Connect columns. Following this table are the FF896 Flip-Chip
Fine-Pitch BGA Package Specifications (1.00mm pitch).
Table 11: FF896 BGA — XC2V1000, XC2V1500, and XC2V2000
Bank
Pin Description
Pin Number No Connect in the XC2V1000 No Connect in the XC2V1500
0
IO_L01N_0
B27
0
IO_L01P_0
A27
0
IO_L02N_0
F24
0
IO_L02P_0
E24
0
IO_L03N_0/VRP_0
C26
0
IO_L03P_0/VRN_0
C25
0
IO_L04N_0/VREF_0
A26
0
IO_L04P_0
A25
0
IO_L05N_0
F23
0
IO_L05P_0
F22
0
IO_L06N_0
C24
0
IO_L06P_0
D25
0
IO_L19N_0
A24
0
IO_L19P_0
B25
0
IO_L20N_0
G22
0
IO_L20P_0
G21
0
IO_L21N_0
D24
0
IO_L21P_0/VREF_0
D23
0
IO_L22N_0
B23
0
IO_L22P_0
B24
0
IO_L23N_0
H21
0
IO_L23P_0
H20
0
IO_L24N_0
E22
0
IO_L24P_0
E23
0
IO_L49N_0
A22
0
IO_L49P_0
B22
0
IO_L50N_0
F21
0
IO_L50P_0
F20
0
IO_L51N_0
C23
0
IO_L51P_0/VREF_0
C22
0
IO_L52N_0
B20
0
IO_L52P_0
B21
DS031-4 (v3.5) November 5, 2007
Product Specification
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