DS031 Datasheet, PDF (234/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 12: FF1152 BGA — XC2V3000, XC2V4000, XC2V6000, and XC2V8000
Bank
Pin Description
Pin Number
7
IO_L45N_7
J34
7
IO_L44P_7
M27
7
IO_L44N_7
L27
7
IO_L43P_7
H31
7
IO_L43N_7
J31
7
IO_L30P_7
F32
7
IO_L30N_7
G32
7
IO_L29P_7
N25
7
IO_L29N_7
M25
7
IO_L28P_7
F34
7
IO_L28N_7
G34
7
IO_L27P_7/VREF_7
J30
7
IO_L27N_7
H30
7
IO_L26P_7
K28
7
IO_L26N_7
L28
7
IO_L25P_7
H28
7
IO_L25N_7
J29
7
IO_L24P_7
G29
7
IO_L24N_7
H29
7
IO_L23P_7
L26
7
IO_L23N_7
K26
7
IO_L22P_7
F33
7
IO_L22N_7
G33
7
IO_L21P_7/VREF_7
J28
7
IO_L21N_7
J27
7
IO_L20P_7
K27
7
IO_L20N_7
J26
7
IO_L19P_7
E31
7
IO_L19N_7
F31
7
IO_L06P_7
D32
7
IO_L06N_7
E32
7
IO_L05P_7
L25
7
IO_L05N_7
K24
7
IO_L04P_7
D34
7
IO_L04N_7
E34
7
IO_L03P_7/VREF_7
G30
No Connect in the XC2V3000
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
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