DS031 Datasheet, PDF (151/318 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Platform FPGAs: Pinout Information
Table 9: BG575/BGG575 BGA — XC2V1000, XC2V1500, and XC2V2000
Bank
Pin Description
Pin Number No Connect in XC2V1000
3
IO_L52N_3
T21
3
IO_L52P_3
T20
3
IO_L51N_3/VREF_3
R20
3
IO_L51P_3
R19
3
IO_L49N_3
W24
3
IO_L49P_3
W23
3
IO_L48N_3
U23
3
IO_L48P_3
V23
3
IO_L46N_3
U22
3
IO_L46P_3
U21
3
IO_L45N_3/VREF_3
V22
3
IO_L45P_3
V21
3
IO_L43N_3
U19
3
IO_L43P_3
U20
3
IO_L24N_3
T19
3
IO_L24P_3
T18
3
IO_L22N_3
R18
3
IO_L22P_3
R17
3
IO_L21N_3/VREF_3
Y24
3
IO_L21P_3
Y23
3
IO_L19N_3
AA24
3
IO_L19P_3
AB24
3
IO_L06N_3
AA23
3
IO_L06P_3
AA22
3
IO_L04N_3
Y22
3
IO_L04P_3
Y21
3
IO_L03N_3/VREF_3
W21
3
IO_L03P_3
W20
3
IO_L02N_3/VRP_3
V20
3
IO_L02P_3/VRN_3
V19
3
IO_L01N_3
U18
3
IO_L01P_3
T17
No Connect in XC2V1500
4
IO_L01N_4/BUSY/DOUT ⁽¹⁾
AD22
4
IO_L01P_4/INIT_B
AD21
4
IO_L02N_4/D0/DIN⁽¹⁾
AA20
DS031-4 (v3.5) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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